Low temperature SER and noise in a high speed DRAM

W. H. Henkels*, N. C.C. Lu, Wei Hwang, T. V. Rajeevakumar, R. L. Franch, K. A. Jenkins, T. J. Bucelot, D. F. Heidel, M. J. Immediato

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

2 Scopus citations

Abstract

The soft error rate (SER) and power bus noise were measured for a high-speed 512 kb CMOS DRAM (dynamic random access memory) operated at liquid-nitrogen temperatures. The SER decreased by about 3-20 times, depending upon cycle time and data type, and the power bus noise increased, but only modestly, at low temperature. These results show that the noise and SER do not preclude high-speed cryogenic DRAM operation. Compensation of increased inductive noise by decreased resistive noise is found to be a significant advantage in obtaining speed improvement by temperature reduction, rather than by room-temperature circuit and device techniques.

Original languageEnglish
Pages5-9
Number of pages5
StatePublished - 1 Dec 1989
EventProceedings of the Workshop on Low Temperature Semiconductor Electronics 1989 - Burlington, VT, USA
Duration: 7 Aug 19898 Aug 1989

Conference

ConferenceProceedings of the Workshop on Low Temperature Semiconductor Electronics 1989
CityBurlington, VT, USA
Period7/08/898/08/89

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