The soft error rate (SER) and power bus noise were measured for a high-speed 512 kb CMOS DRAM (dynamic random access memory) operated at liquid-nitrogen temperatures. The SER decreased by about 3-20 times, depending upon cycle time and data type, and the power bus noise increased, but only modestly, at low temperature. These results show that the noise and SER do not preclude high-speed cryogenic DRAM operation. Compensation of increased inductive noise by decreased resistive noise is found to be a significant advantage in obtaining speed improvement by temperature reduction, rather than by room-temperature circuit and device techniques.
|Number of pages||5|
|State||Published - 1 Dec 1989|
|Event||Proceedings of the Workshop on Low Temperature Semiconductor Electronics 1989 - Burlington, VT, USA|
Duration: 7 Aug 1989 → 8 Aug 1989
|Conference||Proceedings of the Workshop on Low Temperature Semiconductor Electronics 1989|
|City||Burlington, VT, USA|
|Period||7/08/89 → 8/08/89|