By using a conductive perovskite LaNiO 3 (LNO) bottom electrode as seed layer, the crystallization temperature of in-situ sputter deposited PZT has been greatly reduced from 600°C to 350°C∼400°C. LNO's near-perfect lattice match with PZT allows PZT to growth epitaxially at low temperature. The 2Pr value of the low temperature grown PZT is about 20 μC/cm 2 , and this provides 130mV-400mV sense margin when bit line capacitance is 800fF. When Pt is used as the top electrode, an amorphous layer, which degrades the electric fatigue performance, is found at the interface of Pt and PZT. When the top electrode is replaced by LNO, the thickness of the amorphous layer is decreased, and fatigue is improved. COI FeRAM structure can be easily achieved by this low temperature capacitor process, and is suitable for advanced Cu/low-K embedded logic application.
|Number of pages||4|
|Journal||Technical Digest - International Electron Devices Meeting|
|State||Published - 1 Dec 2001|
|Event||IEEE International Electron Devices Meeting IEDM 2001 - Washington, DC, United States|
Duration: 2 Dec 2001 → 5 Dec 2001