Low-power wordline voltage generator for low-voltage flash memory

Tzu Ming Wang*, Ming-Dou Ker, Steve Yeh, Ya Chun Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Wordline voltage generating circuit with high speed active mode and low power standby mode is proposed. In the active mode, two different ring oscillators with high clock frequency (fCLK) 170MHz, and low clock frequency (fCLK) 2SMHz which is also the operating frequency of the entire circuit, are employed. The proposed circuit has a short response time of 3μs typically in active mode, and very low standby current about 3μA in standby mode.

Original languageEnglish
Title of host publicationICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
Pages220-223
Number of pages4
DOIs
StatePublished - 1 Dec 2006
EventICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems - Nice, France
Duration: 10 Dec 200613 Dec 2006

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

ConferenceICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
CountryFrance
CityNice
Period10/12/0613/12/06

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  • Cite this

    Wang, T. M., Ker, M-D., Yeh, S., & Chang, Y. C. (2006). Low-power wordline voltage generator for low-voltage flash memory. In ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems (pp. 220-223). [4263343] (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2006.379765