Low power pre-comparison scheme for NOR-Type 10T content addressable memory

Po-Tsang Huang*, Wei Keng Chang, Wei Hwang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

A pre-comparison scheme is designed by using the NOR-type 10T content addressable memory (CAM) between the match line circuits and the pre-charging circuits. Thereby, several bits are pre-compared in advance through the pre-comparison circuit. With the pre-comparison scheme, it will reduce the discharging time and power consumption when the match line is mismatch. The size of the CAM array is about 32 words, and each word has 32bits. The proposed pre-comparison NOR-type 10T CAM can achieve 22.8% power reduction for the 4bits pre-comparison circuit. All the simulation results are based on TSMC 0.13um CMOS technology and the clock frequency is 500MHz.

Original languageEnglish
Title of host publicationAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Pages1301-1304
Number of pages4
DOIs
StatePublished - 1 Dec 2006
EventAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - , Singapore
Duration: 4 Dec 20066 Dec 2006

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

ConferenceAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
CountrySingapore
Period4/12/066/12/06

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    Huang, P-T., Chang, W. K., & Hwang, W. (2006). Low power pre-comparison scheme for NOR-Type 10T content addressable memory. In APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems (pp. 1301-1304). [4145639] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2006.342422