Low-Cost Parallel FFT Processors with Conflict-Free ROM-Based Twiddle Factor Generator for DVB-T2 Applications1

Ping-Chang Jui, Chin-Long Wey, Muh Tian Shiue

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a conflict-free ROM addressing scheme for generating the TF tables. Basically, the conventional (N/2)-words ROM table for the Radix-2 Memory-Based FFT (MBFFT) processor with single process element (PE) is equally partitioned into 2(p) sub-tables allowing all 2(p) PEs to simultaneously access the twiddle factors without causing any conflict. This study presents the use of MBFFT processor with 4 parallel PEs. Result show that the proposed scheme can reduce the chip area of DVB-T2 applications by 18.85%. The hardware reduction is of significance.
Original languageEnglish
Title of host publication IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)
PublisherIEEE
Pages1003-1006
Number of pages4
DOIs
StatePublished - 2013

Keywords

  • Fast Fourier transform (FFT); orthogonal; Butterfly Processing Element (PE); Twiddle Factors; ROM; Conflict-free ROM Addressing Scheme
  • ARCHITECTURE

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    Jui, P-C., Wey, C-L., & Shiue, M. T. (2013). Low-Cost Parallel FFT Processors with Conflict-Free ROM-Based Twiddle Factor Generator for DVB-T2 Applications1. In IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) (pp. 1003-1006). IEEE. https://doi.org/10.1109/MWSCAS.2013.6674821