Low complexity synchronization design of an OFDM receiver for DVB-T/H

Ting Chen Wei*, Wei Chang Liu, Chi Yao Tseng, Shyh-Jye Jou

*Corresponding author for this work

Research output: Contribution to journalArticle

8 Scopus citations

Abstract

In this paper, an OFDM baseband receiver for DVB-T/H is presented. The receiver contains four synchronizations, an OFDM symbol synchronization, a carrier synchronization, a sampling clock synchronization and a scattered pilots synchronization. This paper proposes several novel designs to reduce the synchronization latency and hardware complexity. The carrier and clock synchronization loops are fully digitalized schemes. The scattered pilots synchronization adopts a two stages scheme to reduce the detection latency. In addition, the pre-filling scheme reduces the latency of channel estimation. The design result shows that the equivalent gate count is about 810K gates including 102.8KB memory.

Original languageEnglish
Pages (from-to)408-413
Number of pages6
JournalIEEE Transactions on Consumer Electronics
Volume55
Issue number2
DOIs
StatePublished - 25 Aug 2009

Keywords

  • DVB
  • OFDM
  • Synchronization

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