A CCSDS-compliant lossless data compressor core for space data and communication system-on-chip designs has been developed to meet the increasing strong demands on high-bandwidth high-speed space data systems. This data compressor core is based on CCSDS lossless data compression standard and designed with space-qualified 150-nm CMOS technology. It occupies a compact chip area of about 700μm × 700 μm. The total power dissipation is 0.2 watts at a throughput rate of 66 Msamples/sec. This compressor core meets low-power, high-throughput, and user-transparent requirements and will be one of valuable silicon intellectual properties for developing next generation high-performance system-on-chip based space data and communication systems.