Long retention and low voltage operation using IrO2/HfAlO/HfSiO/ HfAlO gate stack for memory application

Y. Q. Wang*, P. K. Singh, W. J. Yoo, Y. C. Yeo, G. Samudra, Albert Chin, W. S. Hwang, J. H. Chen, S. J. Wang, D. L. Kwong

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Scopus citations

Abstract

We demonstrate electrical properties of an advanced memory structure with high-k dielectric stack of HfAlO/HfSiO/HfAlO and p-type metal gate IrO 2. Combining advantages of high-k HfAlO, good trapping capability of HfSiO, and high work function of the IrO2 gate, we were able to attain much better retention with 10-year ΔVth decay ratio within 18%, higher erasing speed with ΔVth, of 3V within 0.5ms at Vg = -12V, and lower operation voltage as well as lower reading voltage, compared to other contending device structures.

Original languageEnglish
Title of host publicationIEEE International Electron Devices Meeting, 2005 IEDM - Technical Digest
Pages162-165
Number of pages4
DOIs
StatePublished - 1 Dec 2005
EventIEEE International Electron Devices Meeting, 2005 IEDM - Washington, DC, MD, United States
Duration: 5 Dec 20057 Dec 2005

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume2005
ISSN (Print)0163-1918

Conference

ConferenceIEEE International Electron Devices Meeting, 2005 IEDM
CountryUnited States
CityWashington, DC, MD
Period5/12/057/12/05

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    Wang, Y. Q., Singh, P. K., Yoo, W. J., Yeo, Y. C., Samudra, G., Chin, A., Hwang, W. S., Chen, J. H., Wang, S. J., & Kwong, D. L. (2005). Long retention and low voltage operation using IrO2/HfAlO/HfSiO/ HfAlO gate stack for memory application. In IEEE International Electron Devices Meeting, 2005 IEDM - Technical Digest (pp. 162-165). [1609295] (Technical Digest - International Electron Devices Meeting, IEDM; Vol. 2005). https://doi.org/10.1109/IEDM.2005.1609295