Long-refresh dynamic/quasi-nonvolatile memory device with 2-nm tunneling oxide

Ya Chin King, Tsu Jae King, Chen-Ming Hu

Research output: Contribution to journalArticlepeer-review

42 Scopus citations


A memory device using silicon rich oxide (SRO) as the charge trapping layer for dynamic or quasi-nonvolatile memory application is proposed. The device achieved write and erase speed at low voltage comparable to that of a dynamic-random-access memory (DRAM) cell with a much longer data retention time. This device has a SRO charge trapping layer on top of a very thin tunneling oxide (<2 nm). Using the traps in the SRO layer for charge storage, a symmetrical write/erase characteristics were achieved. This new SRO cell has an erase time much shorter than values of similar devices reported in the literature.

Original languageEnglish
Pages (from-to)409-411
Number of pages3
JournalIEEE Electron Device Letters
Issue number8
StatePublished - 1 Aug 1999

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