Localization of NBTI-induced oxide damage in direct tunneling regime gate oxide pMOSFET using a novel low gate-leakage gated-diode (L2-GD) method

Steve S. Chung*, D. K. Lo, J. J. Yang, T. C. Lin

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

25 Scopus citations

Abstract

As gate oxide thickness reduces, previous reported methods can not work well for very thin gate oxide devices as a result of the measured leakage current through the gate oxide. For the first time, a novel Low gate Leakage Gate-Diode (L2-GD) method has been developed for the interface characterization of MOSFET devices with gate oxide in the direct tunneling regime. Three-peak experimental results, as seen from DCIV measurement, can be easily obtained from this L2-GD method. This method has been demonstrated successfully for the ultra-thin (12-20Å) gate oxide device. Also, by using this new technique, the localized oxide damage due to NBTI or HC (Hot Carrier) stress effect can be identified simply from the measured drain currents. Therefore, this L2-GD technique is well suited for the characterization of very thin gate oxide reliabilities, and in particular for the nano-scale CMOS devices.

Original languageEnglish
Pages (from-to)513-516
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1 Dec 2002
Event2002 IEEE International Devices Meeting (IEDM) - San Francisco, CA, United States
Duration: 8 Dec 200211 Dec 2002

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