Lithography-aware 1-dimensional cell generation

Po Hsun Wu, Po-Hung Lin, Tung Chieh Chen, Tsung Yi Ho, Yu Chuan Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As the process technology advances to the sub-wavelength era, the 1-dimensional (1-D) design style is regarded as one of the most effective ways to continue scaling down the minimum feature size. This paper presents the lithography-aware cell generation algorithms which simultaneously minimize 1-D cell area and enhance the printability. Experimental results show that the proposed algorithms can effectively and efficiently reduce the number of diffusion gaps, and minimize used routing tracks. Consequently, our approach results in smaller 1-D cell area and better printability.

Original languageEnglish
Title of host publication2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
DOIs
StatePublished - 1 Dec 2013
Event2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Dresden, Germany
Duration: 8 Sep 201312 Sep 2013

Publication series

Name2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings

Conference

Conference2013 European Conference on Circuit Theory and Design, ECCTD 2013
CountryGermany
CityDresden
Period8/09/1312/09/13

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  • Cite this

    Wu, P. H., Lin, P-H., Chen, T. C., Ho, T. Y., & Chen, Y. C. (2013). Lithography-aware 1-dimensional cell generation. In 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings [6662310] (2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings). https://doi.org/10.1109/ECCTD.2013.6662310