I/O device drain engineering for a 5V 0.6um CMOS technology

Y. Wei, Y. Loh, C. Wang, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

The ESD robustness of LATID (Large Angle Tilted Implanted Drain) MOSFET for I/O drivers is evaluated and found inadequate for deep submicron 5V CMOS technology. Alternative drain structures are examined and reported to meet the ESD and other criteria. An additional phosphorous implant that creates a LATID/DDD (Double Diffused Drain) structure meets all ESD and device criteria.

Original languageEnglish
Title of host publication1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Proceedings of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages6-10
Number of pages5
ISBN (Electronic)0780309782
DOIs
StatePublished - 1 Jan 1993
Event1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Taipei, Taiwan
Duration: 12 May 199314 May 1993

Publication series

NameInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings
ISSN (Print)1930-8868

Conference

Conference1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993
CountryTaiwan
CityTaipei
Period12/05/9314/05/93

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