Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm

Chun Chen Liu, Yen Hsiang Wang, Yilei Li, Chien Heng Wong, Tien Pei Chou, Young Kai Chen, Mau-Chung Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

With the coming era of Big Data, hardware implementation of machine learning has become attractive for many applications, such as real-time object recognition and face recognition. The implementation of machine learning algorithms needs intensive memory access, and SRAM is critical for the overall performance. This paper proposes a new design of high speed SRAM for machine learning purposes. With fast access time (cycle time: 650 ps, access time: 350 ps), low sensitivity to temperature variation and high configurability (less than 10% performance difference between 125-rcw-tt vs 0-rcw-tt), the proposed SRAM is a better candidate for hardware machine learning system than the conventional SRAM. Compared with Samsung HL 152, our design has smaller size (121×43 um2 vs 127×44 um2) with half the number of pins ports (12 vs 25) and higher speed (2.2GHz vs 0.8GHz).

Original languageEnglish
Title of host publicationProceedings of the 53rd Annual Design Automation Conference, DAC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450342360
DOIs
StatePublished - 5 Jun 2016
Event53rd Annual ACM IEEE Design Automation Conference, DAC 2016 - Austin, United States
Duration: 5 Jun 20169 Jun 2016

Publication series

NameProceedings - Design Automation Conference
Volume05-09-June-2016
ISSN (Print)0738-100X

Conference

Conference53rd Annual ACM IEEE Design Automation Conference, DAC 2016
CountryUnited States
CityAustin
Period5/06/169/06/16

Keywords

  • Deep learning
  • High speed
  • Memory
  • SRAM design
  • Variation tolerance

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