Investigation of inversion capacitance-voltage reconstruction for metal oxide semiconductor field effect transistors with leaky dielectrics using BSIM4/SPICE and intrinsic input resistance model

Wei Lee*, Pin Su, Ke Wei Su, Chung Shi Chiang, Sally Liu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

This paper presents an inversion capacitance-voltage (C-V) reconstruction method for long-channel metal oxide semiconductor field effect transistors (MOSFETs) using the BSIM4/SPICE and the intrinsic input resistance (R ii) model. The concept of Rii has been validated by segmented BSIM4/SPICE simulation. Since the Rii model is scalable with VGS and L, our Rii approach is physically accurate. Due to its simplicity, this method may provide an option for regular process monitoring purposes.

Original languageEnglish
Pages (from-to)1870-1873
Number of pages4
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume46
Issue number4 B
DOIs
StatePublished - 24 Apr 2007

Keywords

  • C-V
  • MOS capacitance
  • MOSFET
  • Ultrathin gate oxide and intrinsic input resistance

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