Investigation of Fin-Width Sensitivity of Threshold Voltage for InGaAs/Si Channel Negative-Capacitance FinFETs

Shih En Huang, Pin Su

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This work investigates the fin-width (WFin) sensitivity of threshold-voltage (VT) for InGaAs and Si channel negative-capacitance FinFETs (NC-FinFETs) using a theoretical quantum subthreshold model corroborated with TCAD numerical simulation. Our study indicates that, due to the action of negative capacitance, the NC-FinFET can possess smaller VT sensitivity to WFin than the FinFET counterpart. Besides, the VT sensitivity to WFin can be further reduced with increasing dielectric constant of the spacer due to the increased internal voltage gain of the NC-FinFET.

Original languageEnglish
Title of host publication2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages16-18
Number of pages3
ISBN (Print)9781538637111
DOIs
StatePublished - 26 Jul 2018
Event2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Kobe, Japan
Duration: 13 Mar 201816 Mar 2018

Publication series

Name2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings

Conference

Conference2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018
CountryJapan
CityKobe
Period13/03/1816/03/18

Keywords

  • CMOS
  • InGaAs
  • Negative capacitance FET

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