Investigation of ferroelectric granularity for double-gate negative-capacitance FETs considering position and number fluctuations

Che Lun Fan, Kuei Yang Tseng, You Sheng Liu, Pin Su

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Using TCAD atomistic simulation, this work investigates the ferroelectric layer granularity of double-gate (DG) negative-capacitance FETs (NCFET) by considering both position and number fluctuations. Our study indicates that the impacts of the ferroelectric ratio on threshold voltage (VT) and subthreshold swing (SS) variations exhibit non-monotonic characteristics, and it is important to include the number fluctuation of the ferroelectric grain to accurately account for the overall variation. In addition, smaller grain size not only reduces the VT and SS variations, but also improves the mean value of the subthreshold swing.

Original languageEnglish
Title of host publication2019 Silicon Nanoelectronics Workshop, SNW 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9784863487024
DOIs
StatePublished - Jun 2019
Event24th Silicon Nanoelectronics Workshop, SNW 2019 - Kyoto, Japan
Duration: 9 Jun 201910 Jun 2019

Publication series

Name2019 Silicon Nanoelectronics Workshop, SNW 2019

Conference

Conference24th Silicon Nanoelectronics Workshop, SNW 2019
CountryJapan
CityKyoto
Period9/06/1910/06/19

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  • Cite this

    Fan, C. L., Tseng, K. Y., Liu, Y. S., & Su, P. (2019). Investigation of ferroelectric granularity for double-gate negative-capacitance FETs considering position and number fluctuations. In 2019 Silicon Nanoelectronics Workshop, SNW 2019 [8782963] (2019 Silicon Nanoelectronics Workshop, SNW 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/SNW.2019.8782963