Internal ESD transients in input protection circuits

Y. Fong*, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

13 Scopus citations

Abstract

The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress.

Original languageEnglish
Pages77-81
Number of pages5
StatePublished - 1 Dec 1989
Event27th Annual Proceedings: Reliability Physics - 1989 -
Duration: 11 Apr 198911 Apr 1989

Conference

Conference27th Annual Proceedings: Reliability Physics - 1989
Period11/04/8911/04/89

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