Interfacial layer dependence on device property of high-κ TiLaO Ge/Si N-type metal-oxide-semiconductor capacitors at small equivalent-oxide thickness

W. B. Chen; Albert Chin

doi:10.1063/1.3265947

Interfacial layer dependence on device property of high-κ TiLaO Ge/Si N-type metal-oxide-semiconductor capacitors at small equivalent-oxide thickness

W. B. Chen, Albert Chin

Department of Electronics Engineering

Research output: Contribution to journal › Article

21 Scopus citations

Abstract

We have investigated the device property dependence of high dielectric-constant (high-κ) TiLaO epitaxial-Ge/Si n -type metal-oxide-semiconductor (n-MOS) capacitors on different GeO ₂ and SiO ₂ interfacial layers. Large capacitance density of 3.3 μF/ cm ² , small equivalent-oxide thickness (EOT) of 0.81 nm and small C-V hysteresis of 19 mV are obtained simultaneously for MOS capacitor using ultrathin SiO ₂ interfacial layer, while the device with ultrathin interfacial GeO ₂ shows inferior performance of larger 1.1 nm EOT and poor C-V hysteresis of 93 mV. From cross-sectional transmission electron microscopy, secondary ion mass spectroscopy, and x-ray photoelectron spectroscopy analysis, the degraded device performance using GeO ₂ interfacial layer is due to the severe Ge outdiffusion, thinned interfacial GeO ₂ and thicker gate dielectric after 550 °C rapid-thermal anneal.

Original language	English
Article number	212105
Journal	Applied Physics Letters
Volume	95
Issue number	21
DOIs	https://doi.org/10.1063/1.3265947
State	Published - 14 Dec 2009

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Chen, W. B., & Chin, A. (2009). Interfacial layer dependence on device property of high-κ TiLaO Ge/Si N-type metal-oxide-semiconductor capacitors at small equivalent-oxide thickness. Applied Physics Letters, 95(21), [212105]. https://doi.org/10.1063/1.3265947

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title = "Interfacial layer dependence on device property of high-κ TiLaO Ge/Si N-type metal-oxide-semiconductor capacitors at small equivalent-oxide thickness",

abstract = " We have investigated the device property dependence of high dielectric-constant (high-κ) TiLaO epitaxial-Ge/Si n -type metal-oxide-semiconductor (n-MOS) capacitors on different GeO 2 and SiO 2 interfacial layers. Large capacitance density of 3.3 μF/ cm 2 , small equivalent-oxide thickness (EOT) of 0.81 nm and small C-V hysteresis of 19 mV are obtained simultaneously for MOS capacitor using ultrathin SiO 2 interfacial layer, while the device with ultrathin interfacial GeO 2 shows inferior performance of larger 1.1 nm EOT and poor C-V hysteresis of 93 mV. From cross-sectional transmission electron microscopy, secondary ion mass spectroscopy, and x-ray photoelectron spectroscopy analysis, the degraded device performance using GeO 2 interfacial layer is due to the severe Ge outdiffusion, thinned interfacial GeO 2 and thicker gate dielectric after 550 °C rapid-thermal anneal.",

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N2 - We have investigated the device property dependence of high dielectric-constant (high-κ) TiLaO epitaxial-Ge/Si n -type metal-oxide-semiconductor (n-MOS) capacitors on different GeO 2 and SiO 2 interfacial layers. Large capacitance density of 3.3 μF/ cm 2 , small equivalent-oxide thickness (EOT) of 0.81 nm and small C-V hysteresis of 19 mV are obtained simultaneously for MOS capacitor using ultrathin SiO 2 interfacial layer, while the device with ultrathin interfacial GeO 2 shows inferior performance of larger 1.1 nm EOT and poor C-V hysteresis of 93 mV. From cross-sectional transmission electron microscopy, secondary ion mass spectroscopy, and x-ray photoelectron spectroscopy analysis, the degraded device performance using GeO 2 interfacial layer is due to the severe Ge outdiffusion, thinned interfacial GeO 2 and thicker gate dielectric after 550 °C rapid-thermal anneal.

AB - We have investigated the device property dependence of high dielectric-constant (high-κ) TiLaO epitaxial-Ge/Si n -type metal-oxide-semiconductor (n-MOS) capacitors on different GeO 2 and SiO 2 interfacial layers. Large capacitance density of 3.3 μF/ cm 2 , small equivalent-oxide thickness (EOT) of 0.81 nm and small C-V hysteresis of 19 mV are obtained simultaneously for MOS capacitor using ultrathin SiO 2 interfacial layer, while the device with ultrathin interfacial GeO 2 shows inferior performance of larger 1.1 nm EOT and poor C-V hysteresis of 93 mV. From cross-sectional transmission electron microscopy, secondary ion mass spectroscopy, and x-ray photoelectron spectroscopy analysis, the degraded device performance using GeO 2 interfacial layer is due to the severe Ge outdiffusion, thinned interfacial GeO 2 and thicker gate dielectric after 550 °C rapid-thermal anneal.

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