Interconnect optimization design with guaranteed performance methods

Trent Gwo Yann Lee*, Tseung-Yuen Tseng, Shyh Chyi Wong, Cheng Jer Yang, Mong Song Liang, Huang-Chung Cheng

*Corresponding author for this work

Research output: Contribution to conferencePaper

Abstract

Two optimization methods based on the delay and crosstalk performance are presented. In specific, we discussed 1) the maximum design dimension for the specified process dimension with guaranteed performance; 2) the maximum process dimension for the specified design dimension with guaranteed performance. The proposed guaranteed-performance interconnect design method is believed to be useful in VLSI synthesis, process design as well as layout optimization.

Original languageEnglish
Pages295-298
Number of pages4
StatePublished - 1 Dec 2001
Event9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems - Singapore, Singapore
Duration: 3 Sep 20015 Sep 2001

Conference

Conference9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems
CountrySingapore
CitySingapore
Period3/09/015/09/01

Fingerprint Dive into the research topics of 'Interconnect optimization design with guaranteed performance methods'. Together they form a unique fingerprint.

  • Cite this

    Lee, T. G. Y., Tseng, T-Y., Wong, S. C., Yang, C. J., Liang, M. S., & Cheng, H-C. (2001). Interconnect optimization design with guaranteed performance methods. 295-298. Paper presented at 9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems, Singapore, Singapore.