An integrated device and circuit simulation has been performed to evaluate the DX-traps-induced performance degradation in direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) AlGaAs/GaAs HEMT inverters. The origin of the DX centers are believed to be due to the complexes of donors (D) and the unknown defects (X). The variation of the output pulse width and the hysteretic characteristics of the input-output voltage transfer function in the inverters are modeled. In comparison with the DCFL inverter, this study shows that the DX-traps-incurred transient phenomena are significantly improved in the SCFL inverters.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - 1 Dec 1991|
|Event||1991 IEEE International Symposium on Circuits and Systems Part 4 (of 5) - Singapore, Singapore|
Duration: 11 Jun 1991 → 14 Jun 1991