INFLUENCE OF HIGH ELECTRIC FIELD CAPTURE AND EMISSION OF A DEEP-LEVEL CENTER IN VLSI DEVICE STRUCTURES.

G. P. Li*, Y. Wu, Mau-Chung Chang, K. L. Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Two new techniques, reverse-bias pulsed deep-level transient spectroscopy (RDLTS) and injection deep-level transient spectroscopy (IDLTS), for use in measuring electric field dependent carrier emission and capture rates, respectively, are described in detail. The Au donor center at E//V plus 0. 35 ev was studied by these two methods as an example. The results indicate that the carrier emission rate increases and that the carrier capture rate decreases in the presence of high electric field. The implication of the enhanced emission and retarded capture is discussed in terms of leakage current and premature breakdown in VLSI device application.

Original languageEnglish
Title of host publicationConference on Solid State Devices and Materials
PublisherBusiness Cent for Academic Soc Japan
Pages107-110
Number of pages4
ISBN (Print)4930813077
DOIs
StatePublished - 1 Dec 1984

Publication series

NameConference on Solid State Devices and Materials

Fingerprint Dive into the research topics of 'INFLUENCE OF HIGH ELECTRIC FIELD CAPTURE AND EMISSION OF A DEEP-LEVEL CENTER IN VLSI DEVICE STRUCTURES.'. Together they form a unique fingerprint.

Cite this