Incremental Delta-Sigma ADCs: A Tutorial Review

Zhichao Tan, Chia Hung Chen*, Youngcheol Chae, Gabor C. Temes

*Corresponding author for this work

Research output: Contribution to journalReview articlepeer-review

1 Scopus citations

Abstract

In many sensor applications, a high-resolution analog-to-digital converter (ADC) is a key block. The use of an incremental delta-sigma ADC (IADC) is often well suited for such applications. While the energy-efficiency of IADCs has improved by several orders of magnitude over the past decade, the implementation of high performance IADCs, especially in battery-powered systems, is still challenging. This paper presents a tutorial review on energy-efficient IADCs and addresses the progress in this area. This paper describes the fundamentals of IADCs and energy-efficient hybrid IADC architectures. Various design techniques for improving the energy-efficiency of the IADCs are described. This paper is intended to serve as a starting point for the development of a new energy-efficient IADC.

Original languageEnglish
Article number9264222
Pages (from-to)4161-4173
Number of pages13
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume67
Issue number12
DOIs
StatePublished - Dec 2020

Keywords

  • Analog-to-digital converter (ADC)
  • and sensor interface
  • chopping
  • decimation filter
  • energy-efficiency
  • energy-efficient amplifier
  • FIR-DAC
  • incremental ADC (IADC)
  • incremental delta-sigma (ΔΣ) modulator
  • integrator slicing
  • negative-R assisted integrator

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