Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces

Chia-Hung Chen, Tao He, Yi Zhang, Gabor C. Temes

Research output: Contribution to journalArticlepeer-review

10 Scopus citations

Abstract

Integrated sensor interface circuits require power-efficient high-accuracy data converters. In many applications, the best choice is to use incremental A/D converters (IADCs) incorporating extended counting. In this paper, we discuss the operation and design of IADCs, including single-loop and MASH architectures. When using a direct-feed-forward modulator, the IADC accumulates the residue voltage, and it is easily to implement a hybrid scheme of extended counting. Several hybrid schemes are review and discussed. A multi-step extended counting scheme is discussed for high-resolution power-efficient conversion. Optimal trade-off between high order and high oversampling ratio is critical for energy efficiency. A two-step IADC is discussed, which extends the performance of an N th-order IADC close to that of a (2N-1)th-order IADC, with reduced power. An implemented device uses the circuitry of a second-order IADC (IADC2) to achieve a performance close to that of a third-order IADC. The two-step operation can be extended to multi-step one, and the SQNR performance can be increased significantly. The two-step operation can be extended to multi-step operation, which can boost up the order of SQNR and further improve the energy efficiency drastically.

Original languageEnglish
Article number7352379
Pages (from-to)612-623
Number of pages12
JournalIEEE Journal on Emerging and Selected Topics in Circuits and Systems
Volume5
Issue number4
DOIs
StatePublished - 1 Dec 2015

Keywords

  • Analog-to-digital converter (ADC)
  • decimation filter
  • delta sigma (Δ\Σ)
  • extended-counting
  • incremental data converters
  • low power
  • measurement and instrumentation
  • multi-stage noise shaping (MASH)
  • multi-step
  • sensor interface
  • time-domain analysis
  • two step

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