In Situ doped source/drain for performance enhancement of double-gated poly-Si nanowire transistors

Wei Chen Chen*, Horng-Chih Lin, Yu Chia Chang, Chuan Ding Lin, Tiao Yuan Huang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

A poly-Si nanowire (NW) thin-film transistor configured with the double-gated scheme was fabricated and characterized. The fabrication process features the clever use of selective plasma etching to form a rectangular NW underneath a hard mask. In this paper, we show that replacing the original ion-implanted poly-Si with in situ doped poly-Si for the source/drain significantly enhances the device performance, including steeper subthreshold swing (SS), larger on/off current ratio, and reduced series resistance. In particular, the SS is improved to a record-breaking low value of 73 mV/dec, which, to the best of our knowledge, is the most ideal ever reported for a poly-Si based device. The new NW transistors with such excellent switching properties are highly promising for reducing power consumption and operational voltage in practical circuit applications.

Original languageEnglish
Article number5471146
Pages (from-to)1608-1615
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume57
Issue number7
DOIs
StatePublished - 1 Jul 2010

Keywords

  • field-effect transistor
  • in situ doping
  • leakage
  • multiple gate
  • nanowire (NW)
  • polycrystalline-Si (poly-Si)

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