Improving Safe-Operating-Area of a 5-V n-Channel Large Array MOSFET in a 0.15-μ m BCD Process

Karuna Nidhi, Ming-Dou Ker*, Tingyou Lin, Jian Hsing Lee

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

The safe-operating-area (SOA) of large array device (LAD) is one of the most important factors affecting the device reliability. In this paper, the improvement of the electrical-SOA (E-SOA) and the thermal-SOA (T-SOA) by using an optional implantation layer for 5-V n-channel large array MOSFET has been investigated in a 0.15-μm bipolar-CMOS-DMOS process. Experimental results showed that the secondary breakdown current (It2) is improved by 5 times, and a significant improvement is also observed in the E-SOA and the T-SOA boundary as compared to the original device. In addition, the impact of inserting additional layout pick-ups into themultiple-finger layout of large array MOSFET to the E-SOA, It2, and trigger voltage is also practically investigated in silicon for the LAD with a total width of 12 000 μm.

Original languageEnglish
Pages (from-to)2948-2956
Number of pages9
JournalIEEE Transactions on Electron Devices
Volume65
Issue number7
DOIs
StatePublished - 1 Jul 2018

Keywords

  • Electrical-SOA (E-SOA)
  • large array device (LAD)
  • safe-operating-area (SOA)
  • thermal-SOA (T-SOA)
  • transmission line pulsing (TLP)

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