Improving datapath utilization of programmable DSP with composite functional units

Shih Hao Ou*, Yi Cho, Tay Jyi Lin, Chih-Wei Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

A scalar (single-issue) processor executes one instruction at a time and its functional units (ALU, multiplier, and shifter, etc) are never concurrently exercised. Modern processors issue multiple instructions simultaneously (i.e. superscalar or VLIW) to improve their functional unit utilization but the cost is considerably high. In this paper, an alternative is described to activate multiple functional units concurrently by issuing a composite instruction on cascaded functional units. Besides, an automatic generator for application-specific composite functional units is presented. In our simulation with popular DSP applications, 35% increase on the operations per cycle can be simply obtained with identical functional units. Moreover, our proposed approach saves up to 16.5% and 31.6% power on scalar and VLIW respectively for comparable performance.

Original languageEnglish
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages3438-3441
Number of pages4
DOIs
StatePublished - 19 Sep 2008
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: 18 May 200821 May 2008

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
CountryUnited States
CitySeattle, WA
Period18/05/0821/05/08

Fingerprint Dive into the research topics of 'Improving datapath utilization of programmable DSP with composite functional units'. Together they form a unique fingerprint.

Cite this