Improvement of Fermi-level pinning (FLP) and relaxation of negative-bias-temperature-instability (NBTI) for CMOS without interfacial layers was achieved by fluorine incorporation into HfO2. The driving current capability was increased up to 48% and 45% for n-MOSFET and p-MOSFET, respectively. It's caused by the oxygen vacancy was blocked by the fluorine incorporated interface and resulted in the suppression of the interfacial oxide growth to achieved thinner effective oxide thickness (EOT). The improvement included the Fermi-level pinning shift from ∼0.1eV to ∼0.02eV for samples without and with fluorination, respectively. Vth shifts under NBTI stressing were relaxed from positive 350mv to negative 270mv for control and fluorinated samples, respectively. It is due to the Si-F bondings broken under NBTI stressing which the released-fluorine re-incorporate to passivate the HfO2 bulk.