Improved performance of ultra-thin HFO2 CMOSFETs using poly-SiGe gate

Qiang Lu*, Hideki Takeuchi, Xiaofan Meng, Tsu Jae King, Chen-Ming Hu, Katsunori Onishi, Hag Ju Cho, Jack Lee

*Corresponding author for this work

Research output: Contribution to conferencePaper

9 Scopus citations

Abstract

Poly-SiGe is investigated as the gate material for CMOS transistors with ultra-thin HfO2 gate dielectric. Compared with poly-Si, poly-SiGe reduces the gate depletion effect, and also results in thinner EOT of the gate dielectric after 1000°C annealing, with low gate leakage maintained. The Si interface quality is also better than that achieved with surface nitridation, which has been used to reduce EOT. Therefore, the use of poly-SiGe as the gate material is effective for improving the performance of ultra-thin HfO2 CMOS transistors.

Original languageEnglish
Pages86-87
Number of pages2
DOIs
StatePublished - 1 Jan 2002
Event2002 Symposium on VLSI Technology Digest of Technical Papers - Honolulu, HI, United States
Duration: 11 Jun 200213 Jun 2002

Conference

Conference2002 Symposium on VLSI Technology Digest of Technical Papers
CountryUnited States
CityHonolulu, HI
Period11/06/0213/06/02

Fingerprint Dive into the research topics of 'Improved performance of ultra-thin HFO<sub>2</sub> CMOSFETs using poly-SiGe gate'. Together they form a unique fingerprint.

Cite this