Implementation of initial-on ESD protection concept with PMOS-triggered SCR devices in deep-submicron CMOS technology

Ming-Dou Ker*, Shih Hung Chen

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

26 Scopus citations

Abstract

In order to enhance the applications of SCR devices for deep-submicron CMOS technology, a novel SCR design with "initial-on" function is proposed to achieve the lowest trigger voltage and the highest turn-on efficiency of SCR device for effective on-chip ESD protection. Without using the special native device (NMOS with almost zero or even negative threshold voltage) or any process modification, this initial-on SCR design is implemented by PMOS-triggered SCR device, which can be realized in general CMOS processes. This initial-on SCR design has a high enough holding voltage to avoid latchup issues in a VDD operation voltage of 2.5 V. The new proposed initial-on ESD protection design with PMOS-triggered SCR device has been successfully verified in a fully-silicided 0.25-μm CMOS process.

Original languageEnglish
Pages (from-to)1158-1167
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Volume42
Issue number5
DOIs
StatePublished - 1 May 2007

Keywords

  • Electrostatic discharges (ESD)
  • Holding voltage
  • Silicon controlled rectifier (SCR)
  • Turn-on efficiency

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