Implementation of a high speed multiport register file in a 1.8V, 0.25 μm CMOS bulk and SOI technology

R. V. Joshi*, Wei Hwang, S. Wilson, G. Shahidi, C. T. Chuang

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

The experimental hardware results of a high speed 8-ports, 32 Words × 64-bit register file in 1.8 V, 0.25 μm CMOS bulk and SOI silicon technology are presented. Such a register file is designed for bulk technology but is also remapped and fabricated in SOI technology without any body contacts. It is shown that the register file in SOI achieves more than 20% performance gain over the counterpart.

Original languageEnglish
Pages (from-to)274-277
Number of pages4
JournalInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings
DOIs
StatePublished - 1 Jan 1999
EventProceedings of the 1999 International Symposium on VLSI Technology, Systems, and Applications - Taipei, Taiwan
Duration: 7 Jun 199910 Jun 1999

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