Impacts of NBTI and PBTI on power-gated SRAM with high-k metal-gate devices

Hao I. Yang*, Ching Te Chuang, Wei Hwang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

The threshold voltage (VT) drift induced by Negative Bias Temperature Instability (NBTI) weakens PFETs, while Positive Bias Temperature Instability (PBTI) weakens NFETs fabricated with high-k metal-gate, respectively. These long-term VT drifts degrade SRAM cell stability, margin and performance, and may lead to functional failure over the life of usage. Additionally, most state-of-the-art SRAMs are designed with power-gating structures to reduce leakage currents in Standby or Sleep mode, and the power switches suffer NBTI or PBTI stress/degradation as well. This paper presents a comprehensive analysis on the impacts of NBTI and PBTI on power-gated SRAM arrays with high-k metal-gate devices. NBTI/PBTI tolerant sense amplifier structures are also discussed.

Original languageEnglish
Title of host publication2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages377-380
Number of pages4
DOIs
StatePublished - 26 Oct 2009
Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
Duration: 24 May 200927 May 2009

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
CountryTaiwan
CityTaipei
Period24/05/0927/05/09

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    Yang, H. I., Chuang, C. T., & Hwang, W. (2009). Impacts of NBTI and PBTI on power-gated SRAM with high-k metal-gate devices. In 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 (pp. 377-380). [5117764] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2009.5117764