Impacts of multiple-gated configuration on the characteristics of poly-si nanowire SONOS devices

Hsing Hui Hsu; Horng-Chih Lin; Cheng Wei Luo; Chun Jung Su; Tiao Yuan Huang

doi:10.1109/TED.2010.2098033

Impacts of multiple-gated configuration on the characteristics of poly-si nanowire SONOS devices

Hsing Hui Hsu^*, Horng-Chih Lin, Cheng Wei Luo, Chun Jung Su, Tiao Yuan Huang

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Contribution to journal › Article › peer-review

10 Scopus citations

Abstract

In this paper, we have proposed a simple and novel way to fabricate poly-Si nanowire (NW)-silicon-oxide-nitride-oxide-silicon (SONOS) devices with various gate configurations. Three types of devices having various gate configurations, such as side gated, Ω-shaped gated ΩG, and gate-all-around (GAA), were successfully fabricated and characterized. The experimental results show that, owing to the superior gate controllability over NW channels, much improved transfer characteristics are achieved with the GAA devices, as compared with the other types of devices. Moreover, GAA devices also exhibit the best memory characteristics among all splits, including the fastest programming/erasing efficiency, largest memory window, and best endurance/retention characteristics, highlighting the potential of such scheme for future SONOS applications.

Original language	English
Article number	5699915
Pages (from-to)	641-649
Number of pages	9
Journal	IEEE Transactions on Electron Devices
Volume	58
Issue number	3
DOIs	https://doi.org/10.1109/TED.2010.2098033
State	Published - 1 Mar 2011

Keywords

Field-effect transistor (FET)
multiple gate (MG)
nanowire (NW)
poly-Si
silicon-oxide-nitride-oxide-silicon (SONOS)

Access to Document

10.1109/TED.2010.2098033

Link to publication in Scopus

Fingerprint Dive into the research topics of 'Impacts of multiple-gated configuration on the characteristics of poly-si nanowire SONOS devices'. Together they form a unique fingerprint.

Cite this

@article{215f4253ebc646e685cdb7734b870568,

title = "Impacts of multiple-gated configuration on the characteristics of poly-si nanowire SONOS devices",

abstract = "In this paper, we have proposed a simple and novel way to fabricate poly-Si nanowire (NW)-silicon-oxide-nitride-oxide-silicon (SONOS) devices with various gate configurations. Three types of devices having various gate configurations, such as side gated, Ω-shaped gated ΩG, and gate-all-around (GAA), were successfully fabricated and characterized. The experimental results show that, owing to the superior gate controllability over NW channels, much improved transfer characteristics are achieved with the GAA devices, as compared with the other types of devices. Moreover, GAA devices also exhibit the best memory characteristics among all splits, including the fastest programming/erasing efficiency, largest memory window, and best endurance/retention characteristics, highlighting the potential of such scheme for future SONOS applications.",

keywords = "Field-effect transistor (FET), multiple gate (MG), nanowire (NW), poly-Si, silicon-oxide-nitride-oxide-silicon (SONOS)",

author = "Hsu, {Hsing Hui} and Horng-Chih Lin and Luo, {Cheng Wei} and Su, {Chun Jung} and Huang, {Tiao Yuan}",

year = "2011",

month = mar,

day = "1",

doi = "10.1109/TED.2010.2098033",

language = "English",

volume = "58",

pages = "641--649",

journal = "Ieee Transactions On Electron Devices",

issn = "0018-9383",

publisher = "IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC",

number = "3",

}

TY - JOUR

T1 - Impacts of multiple-gated configuration on the characteristics of poly-si nanowire SONOS devices

AU - Hsu, Hsing Hui

AU - Lin, Horng-Chih

AU - Luo, Cheng Wei

AU - Su, Chun Jung

AU - Huang, Tiao Yuan

PY - 2011/3/1

Y1 - 2011/3/1

N2 - In this paper, we have proposed a simple and novel way to fabricate poly-Si nanowire (NW)-silicon-oxide-nitride-oxide-silicon (SONOS) devices with various gate configurations. Three types of devices having various gate configurations, such as side gated, Ω-shaped gated ΩG, and gate-all-around (GAA), were successfully fabricated and characterized. The experimental results show that, owing to the superior gate controllability over NW channels, much improved transfer characteristics are achieved with the GAA devices, as compared with the other types of devices. Moreover, GAA devices also exhibit the best memory characteristics among all splits, including the fastest programming/erasing efficiency, largest memory window, and best endurance/retention characteristics, highlighting the potential of such scheme for future SONOS applications.

AB - In this paper, we have proposed a simple and novel way to fabricate poly-Si nanowire (NW)-silicon-oxide-nitride-oxide-silicon (SONOS) devices with various gate configurations. Three types of devices having various gate configurations, such as side gated, Ω-shaped gated ΩG, and gate-all-around (GAA), were successfully fabricated and characterized. The experimental results show that, owing to the superior gate controllability over NW channels, much improved transfer characteristics are achieved with the GAA devices, as compared with the other types of devices. Moreover, GAA devices also exhibit the best memory characteristics among all splits, including the fastest programming/erasing efficiency, largest memory window, and best endurance/retention characteristics, highlighting the potential of such scheme for future SONOS applications.

KW - Field-effect transistor (FET)

KW - multiple gate (MG)

KW - nanowire (NW)

KW - poly-Si

KW - silicon-oxide-nitride-oxide-silicon (SONOS)

UR - http://www.scopus.com/inward/record.url?scp=79952041184&partnerID=8YFLogxK

U2 - 10.1109/TED.2010.2098033

DO - 10.1109/TED.2010.2098033

M3 - Article

AN - SCOPUS:79952041184

VL - 58

SP - 641

EP - 649

JO - Ieee Transactions On Electron Devices

JF - Ieee Transactions On Electron Devices

SN - 0018-9383

IS - 3

M1 - 5699915

ER -