In this letter, fluorine ion implantation with lowtemperature solid-phase crystallized activation scheme is used to obtain a high-performance HfO 2 low-temperature poly-Si thin-film transistor (LTPS-TFT) for the first time. The secondary ion mass spectrometer (SIMS) analysis shows a different fluorine pro-file compared to that annealed at high temperature. About one order current reduction of I min is achieved because 25% grainboundary traps are passivated by fluorine implantation. In addition, the threshold voltage instability of hot carrier stress is also improved with the introduction of fluorine. The LTPS-TFT with HfO 2 gate dielectric and fluorine preimplantation can simultaneously achieve low V TH ∼ 1.32 V, excellent subthreshold swing ∼ 0.141 V/ dec, and high I ON /Imin current ratio ∼ 1.98 × 10 7 .
- Fluorine implantation
- High-κ hot carrier stress
- Low-temperature poly-Si thin-film transistors (LTPS-TFTs)