The effects of rapid thermal annealing (RTA) performed after source/drain (S/D) implantation on the characteristics of complementary metal-oxide-semiconductor (CMOS) transistors with a TiN metal gate were investigated thoroughly. It was shown that n-channel devices require a higher thermal budget in order to reduce junction leakage, compared to p-channel devices. It was also found that the flat-band voltage and oxide thickness are both affected by the annealing temperature, particularly for p-channel devices. In n-channel devices, the gate leakage current level is highly dependent on channel length and RTA temperatures. Further analysis indicated that the agglomeration phenomenon during the high-temperature RTA step occurs more easily as the metal gate length becomes narrower. When this happens, gate oxide integrity is degraded, resulting in an increased gate leakage of n-channel transistors.
|Number of pages||6|
|Journal||Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers|
|Issue number||2 A|
|State||Published - 1 Feb 2002|
- Metal gate