Impact of surface roughness on silicon and Germanium ultra-thin-body MOSFETs

Tony Low*, M. F. Li, W. J. Fan, S. T. Ng, Y. C. Yeo, C. Zhu, Albert Chin, L. Chan, D. L. Kwong

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

34 Scopus citations

Abstract

Ultra-thin body (UTB) SOI MOSFET is promising for sub-50 nm CMOS technologies [1]. However, recent experimental finding [2] suggests the need for serious reconsiderations of its long-term scaling capability into the sub-10 nm body thickness (T BODY) regime. Two new phenomena attributed to surface roughness (SR) are identified [2]; they are enhanced threshold voltage (V TH) shifts and drastic degradation of mobility with a T BODY dependence [2,3]. In this work, we detail a study of these two phenomena in UTB MOSFETs with sub 10 nm T BODY Si and Ge channels. Firstly, the phenomena of enhanced V TH shifts is modeled by accounting for the fluctuation of quantized energy levels due to SR up to second order approximation. Good corroboration with experimental results [2] is obtained. Our model is then applied to examine the impact of enhanced V TH shifts on metal gate workfunction requirements. Secondly, we modeled the SR-limited electron and hole mobility and discuss their impact on the choice of surface orientations. Mobility anisotropy are also examined for the various surface orientations.

Original languageEnglish
Pages (from-to)151-154
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting, IEDM
DOIs
StatePublished - 1 Dec 2004
EventIEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States
Duration: 13 Dec 200415 Dec 2004

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