On-chip global interconnect exhibits clear frequency dependence in both resistance (R) and inductance (L). In this paper, its impact on modern digital and radio frequency (RF) circuit design is examined. First, a physical and compact ladder circuit model is developed to capture this behavior, which only employs frequency independent R and L elements, and thus, supports transient analysis. Using this new model we demonstrate that the use of dc values for R and L is sufficient for timing analysis (i.e., 50% delay and slew rate) in digital designs. However, RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.
|Number of pages||5|
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|State||Published - 1 Jan 2005|
- Quality factor
- Slew rate