Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms

Yu Chien Chiu, Chun-Yen Chang, Hsiao-Hsuan Hsu, Chun-Hu Cheng, Min Hung Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 10(12)-cycling endurance at 85 degrees C. Such excellent endurance reliability at 85 degrees C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.
Original languageEnglish
Title of host publicationIEEE International Reliability Physics Symposium (IRPS)
StatePublished - 2015

Keywords

  • nonvolatile memory; ferroelectric polarization; charge trapping; endurance; retention

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    Chiu, Y. C., Chang, C-Y., Hsu, H-H., Cheng, C-H., & Lee, M. H. (2015). Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms. In IEEE International Reliability Physics Symposium (IRPS)