Impact of encoding algorithms on MPEG VLSI implementation

Sheu Chih Cheng*, Hsueh-Ming Hang

*Corresponding author for this work

Research output: Contribution to journalConference article

2 Scopus citations

Abstract

The goal of this paper is to study the impact of MPEG encoding algorithms from a system-level design viewpoint. An area-time estimation tool is developed to extract the timing requirement and silicon area for various combinations of hardware modules and algorithms. After complemented the design of several modules in an MPEG encoder, we found that, the motion estimation and rate control modules consume most part of the silicon area in the encoding chip. We also evaluated the entire chip area of a few cases for two picture formats. The methodology and results presented here should provide useful guidelines in selecting an appropriate MPEG encoding algorithm for VLSI design.

Original languageEnglish
Pages (from-to)102-105
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
DOIs
StatePublished - 1 Jan 1998
EventProceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA
Duration: 31 May 19983 Jun 1998

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