Impact of CMOS scaling on RF/MMIC designs

Mau-Chung Chang; Daquan Huang

doi:10.1109/RFIT.2007.4443946

Impact of CMOS scaling on RF/MMIC designs

Mau-Chung Chang, Daquan Huang

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Recent performance advancement in superscaled CMOS technologies has opened new avenues for implementing RF/MMICs on cost-effective mainstream silicon substrate. This talk addresses critical issues involved in designing those high-frequency circuits under technology constraints of decreasing supply voltage and device gain, increasing device mismatch and metal & substrate losses. The talk will also discuss possible circuit level solutions in both topology and signaling, which may mitigate those constraints and deliver demanded performance and functions for future high frequency communication systems.

Original language	English
Title of host publication	RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology
Pages	183-187
Number of pages	5
DOIs	https://doi.org/10.1109/RFIT.2007.4443946
State	Published - 1 Dec 2007
Event	IEEE International Workshop on Radio-Frequency Integration Technology, RFIT 2007 - Singapore, Singapore Duration: 9 Dec 2007 → 11 Dec 2007

Publication series

Name	RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology

Conference

Conference	IEEE International Workshop on Radio-Frequency Integration Technology, RFIT 2007
Country	Singapore
City	Singapore
Period	9/12/07 → 11/12/07

Keywords

Circuit topology and signaling
CMOS scaling
High-Q passives
MMIC
RFIC

Access to Document

10.1109/RFIT.2007.4443946

Fingerprint Dive into the research topics of 'Impact of CMOS scaling on RF/MMIC designs'. Together they form a unique fingerprint.

Cite this

@inproceedings{8a388b0781e04220aa10f976c7f8e75d,

title = "Impact of CMOS scaling on RF/MMIC designs",

abstract = "Recent performance advancement in superscaled CMOS technologies has opened new avenues for implementing RF/MMICs on cost-effective mainstream silicon substrate. This talk addresses critical issues involved in designing those high-frequency circuits under technology constraints of decreasing supply voltage and device gain, increasing device mismatch and metal & substrate losses. The talk will also discuss possible circuit level solutions in both topology and signaling, which may mitigate those constraints and deliver demanded performance and functions for future high frequency communication systems.",

keywords = "Circuit topology and signaling, CMOS scaling, High-Q passives, MMIC, RFIC",

author = "Mau-Chung Chang and Daquan Huang",

year = "2007",

month = dec,

day = "1",

doi = "10.1109/RFIT.2007.4443946",

language = "English",

isbn = "1424413079",

series = "RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology",

pages = "183--187",

booktitle = "RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology",

note = "null ; Conference date: 09-12-2007 Through 11-12-2007",

}

Chang, M-C & Huang, D 2007, Impact of CMOS scaling on RF/MMIC designs. in RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology., 4443946, RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology, pp. 183-187, IEEE International Workshop on Radio-Frequency Integration Technology, RFIT 2007, Singapore, Singapore, 9/12/07. https://doi.org/10.1109/RFIT.2007.4443946

Impact of CMOS scaling on RF/MMIC designs. / Chang, Mau-Chung; Huang, Daquan.

RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology. 2007. p. 183-187 4443946 (RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Impact of CMOS scaling on RF/MMIC designs

AU - Chang, Mau-Chung

AU - Huang, Daquan

PY - 2007/12/1

Y1 - 2007/12/1

N2 - Recent performance advancement in superscaled CMOS technologies has opened new avenues for implementing RF/MMICs on cost-effective mainstream silicon substrate. This talk addresses critical issues involved in designing those high-frequency circuits under technology constraints of decreasing supply voltage and device gain, increasing device mismatch and metal & substrate losses. The talk will also discuss possible circuit level solutions in both topology and signaling, which may mitigate those constraints and deliver demanded performance and functions for future high frequency communication systems.

AB - Recent performance advancement in superscaled CMOS technologies has opened new avenues for implementing RF/MMICs on cost-effective mainstream silicon substrate. This talk addresses critical issues involved in designing those high-frequency circuits under technology constraints of decreasing supply voltage and device gain, increasing device mismatch and metal & substrate losses. The talk will also discuss possible circuit level solutions in both topology and signaling, which may mitigate those constraints and deliver demanded performance and functions for future high frequency communication systems.

KW - Circuit topology and signaling

KW - CMOS scaling

KW - High-Q passives

KW - MMIC

KW - RFIC

UR - http://www.scopus.com/inward/record.url?scp=49949114150&partnerID=8YFLogxK

U2 - 10.1109/RFIT.2007.4443946

DO - 10.1109/RFIT.2007.4443946

M3 - Conference contribution

AN - SCOPUS:49949114150

SN - 1424413079

SN - 9781424413072

T3 - RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology

SP - 183

EP - 187

BT - RFIT 2007 - IEEE International Workshop on Radio-Frequency Integration Technology

Y2 - 9 December 2007 through 11 December 2007

ER -

Impact of CMOS scaling on RF/MMIC designs

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Cite this