IDCT processor on the adder-based distributed arithmetic

Chingson Chen*, Tian-Sheuan Chang, Chein Wei Jen

*Corresponding author for this work

Research output: Contribution to conferencePaper

5 Scopus citations

Abstract

A new DA (distributed arithmetic) method called ladder-based DA is proposed to evaluate the inner products of vectors. The proposed method needs only 13% of transistor count and 30% of ROM area with comparable performance. A 2D IDCT (Inverse Discrete Cosine Transform) chip is designed and implemented on the adder-based DA to verify the correctness and efficiency of the method.

Original languageEnglish
Pages36-37
Number of pages2
StatePublished - 1 Jan 1996
EventProceedings of the 1996 Symposium on VLSI Circuits - Honolulu, HI, USA
Duration: 13 Jun 199615 Jun 1996

Conference

ConferenceProceedings of the 1996 Symposium on VLSI Circuits
CityHonolulu, HI, USA
Period13/06/9615/06/96

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    Chen, C., Chang, T-S., & Jen, C. W. (1996). IDCT processor on the adder-based distributed arithmetic. 36-37. Paper presented at Proceedings of the 1996 Symposium on VLSI Circuits, Honolulu, HI, USA, .