Hot-carrier-reliability of mixed analog/digital technologies

Khandker N. Quader, Wilson Y. Chan, Ping K. Ko, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

DC lifetime, in conjunction with speed and time factors, can be used to predict digital circuit hot-carrier lifetime. Analog circuit reliability prediction, on the other hand, has to take analog design variables such as channel length, biasing conditions, and circuit topography into consideration. We propose a new methodology for predicting analog circuit reliability. Instead of the traditional lifetime plots, we present a set of analog hot-carrier design curves that span the analog design space. The design curves will become increasingly important for high speed analog applications and for ULSI chips that integrate a wide variety of analog and digital functions. The design curves can be used to quickly estimate the hot-carrier sensitivity of a particular analog sub-block and to adjust the design variables for better hot-carrier immunity.

Original languageEnglish
Title of host publication1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Proceedings of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages168-172
Number of pages5
ISBN (Electronic)0780309782
DOIs
StatePublished - 1 Jan 1993
Event1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Taipei, Taiwan
Duration: 12 May 199314 May 1993

Publication series

NameInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings
ISSN (Print)1930-8868

Conference

Conference1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993
CountryTaiwan
CityTaipei
Period12/05/9314/05/93

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