Hot carrier reliability considerations for low Vdd CMOS technology

Chun Jiang*, Dipu Pramanik, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

2 Scopus citations

Abstract

Hot carrier reliability for low Vdd technology and circuit operation was investigated. It is found that a degraded NMOSFET has larger Id degradation at lower Vdd operation. Moreover, I/O circuits at low Vdd have more stringent requirement for hot carrier reliability. CMOS input threshold voltage is increased after either N or P MOSFET degradation as is the output low voltage.

Original languageEnglish
Pages322-324
Number of pages3
StatePublished - 1 Dec 1995
EventProceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China
Duration: 24 Oct 199528 Oct 1995

Conference

ConferenceProceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology
CityBeijing, China
Period24/10/9528/10/95

Fingerprint Dive into the research topics of 'Hot carrier reliability considerations for low Vdd CMOS technology'. Together they form a unique fingerprint.

Cite this