High voltage lateral 4H-SiC JFETs on a semi-insulating substrate

Chih Fang Huang; Cheng Li Kan; Tian-Li Wu; Meng Chia Lee; Yo Zthu Liu; Kung Yen Lee; Feng Zhao

doi:10.1109/DRC.2009.5354929

High voltage lateral 4H-SiC JFETs on a semi-insulating substrate

Chih Fang Huang^*, Cheng Li Kan, Tian-Li Wu, Meng Chia Lee, Yo Zthu Liu, Kung Yen Lee, Feng Zhao

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Because of the superior material properties, silicon carbide (SiC) devices have drawn considerable attention in high power and high temperature applications. Promising performance has been demonstrated on both vertical and lateral devices [1] - [3]. In this paper, we report the performance of high voltage lateral 4H-SiC JFETs built on a semi-insulating substrate. The drift region design is based on charge compensation of the n-and p-type materials. The best achieved breakdown voltage is 3510 V, which is the highest value ever published for SiC lateral switching devices. R_{on, sp} is 390 mΩ-cm², resulting in a BV²/R_{on, sp} of 32 MW/cm².

Original language	English
Title of host publication	67th Device Research Conference, DRC 2009
Pages	275-276
Number of pages	2
DOIs	https://doi.org/10.1109/DRC.2009.5354929
State	Published - 11 Dec 2009
Event	67th Device Research Conference, DRC 2009 - University Park, PA, United States Duration: 22 Jun 2009 → 24 Jun 2009

Publication series

Name	Device Research Conference - Conference Digest, DRC
ISSN (Print)	1548-3770

Conference

Conference	67th Device Research Conference, DRC 2009
Country	United States
City	University Park, PA
Period	22/06/09 → 24/06/09

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10.1109/DRC.2009.5354929

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title = "High voltage lateral 4H-SiC JFETs on a semi-insulating substrate",

abstract = "Because of the superior material properties, silicon carbide (SiC) devices have drawn considerable attention in high power and high temperature applications. Promising performance has been demonstrated on both vertical and lateral devices [1] - [3]. In this paper, we report the performance of high voltage lateral 4H-SiC JFETs built on a semi-insulating substrate. The drift region design is based on charge compensation of the n-and p-type materials. The best achieved breakdown voltage is 3510 V, which is the highest value ever published for SiC lateral switching devices. Ron, sp is 390 mΩ-cm2, resulting in a BV2/Ron, sp of 32 MW/cm2.",

author = "Huang, {Chih Fang} and Kan, {Cheng Li} and Tian-Li Wu and Lee, {Meng Chia} and Liu, {Yo Zthu} and Lee, {Kung Yen} and Feng Zhao",

year = "2009",

month = dec,

day = "11",

doi = "10.1109/DRC.2009.5354929",

language = "English",

isbn = "9781424435289",

series = "Device Research Conference - Conference Digest, DRC",

pages = "275--276",

booktitle = "67th Device Research Conference, DRC 2009",

note = "null ; Conference date: 22-06-2009 Through 24-06-2009",

}

Huang, CF, Kan, CL, Wu, T-L, Lee, MC, Liu, YZ, Lee, KY & Zhao, F 2009, High voltage lateral 4H-SiC JFETs on a semi-insulating substrate. in 67th Device Research Conference, DRC 2009., 5354929, Device Research Conference - Conference Digest, DRC, pp. 275-276, 67th Device Research Conference, DRC 2009, University Park, PA, United States, 22/06/09. https://doi.org/10.1109/DRC.2009.5354929

High voltage lateral 4H-SiC JFETs on a semi-insulating substrate. / Huang, Chih Fang; Kan, Cheng Li; Wu, Tian-Li; Lee, Meng Chia; Liu, Yo Zthu; Lee, Kung Yen; Zhao, Feng.

67th Device Research Conference, DRC 2009. 2009. p. 275-276 5354929 (Device Research Conference - Conference Digest, DRC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - High voltage lateral 4H-SiC JFETs on a semi-insulating substrate

AU - Huang, Chih Fang

AU - Kan, Cheng Li

AU - Wu, Tian-Li

AU - Lee, Meng Chia

AU - Liu, Yo Zthu

AU - Lee, Kung Yen

AU - Zhao, Feng

PY - 2009/12/11

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N2 - Because of the superior material properties, silicon carbide (SiC) devices have drawn considerable attention in high power and high temperature applications. Promising performance has been demonstrated on both vertical and lateral devices [1] - [3]. In this paper, we report the performance of high voltage lateral 4H-SiC JFETs built on a semi-insulating substrate. The drift region design is based on charge compensation of the n-and p-type materials. The best achieved breakdown voltage is 3510 V, which is the highest value ever published for SiC lateral switching devices. Ron, sp is 390 mΩ-cm2, resulting in a BV2/Ron, sp of 32 MW/cm2.

AB - Because of the superior material properties, silicon carbide (SiC) devices have drawn considerable attention in high power and high temperature applications. Promising performance has been demonstrated on both vertical and lateral devices [1] - [3]. In this paper, we report the performance of high voltage lateral 4H-SiC JFETs built on a semi-insulating substrate. The drift region design is based on charge compensation of the n-and p-type materials. The best achieved breakdown voltage is 3510 V, which is the highest value ever published for SiC lateral switching devices. Ron, sp is 390 mΩ-cm2, resulting in a BV2/Ron, sp of 32 MW/cm2.

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BT - 67th Device Research Conference, DRC 2009

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High voltage lateral 4H-SiC JFETs on a semi-insulating substrate

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