High temperature formed SiGe P-MOSFET's with good device characteristics

Y. H. Wu*, Albert Chin

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

19 Scopus citations

Abstract

We have used a simple process to fabricate Si0.3Ge0.7/Si p-MOSFET's. The Si0.3Ge0.7 is formed using deposited Ge followed by 950°C rapid thermal annealing and solid phase epitaxy that is process compatible with existing VLSI. Hole mobility of 250 cm2/Vs is obtained from Si0.3Ge0.7 p-MOSFET that is approx. two times higher than Si control devices and results in a consequent substantially higher current drive. The 228 angstrom Si0.3Ge0.7 thermal oxide grown at 1000°C has a high breakdown field of 15 MV/cm, low interface trap density (Dit) of 1.5 × 1011 eV-1cm-2, and low oxide charge of 7.2 × 1010 cm-2. The source-drain junction leakage after implantation and 950°C RTA is also comparable with Si counterpart.

Original languageEnglish
Pages (from-to)350-352
Number of pages3
JournalIEEE Electron Device Letters
Volume21
Issue number7
DOIs
StatePublished - 1 Jul 2000

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