High-speed multilevel wrapped-select-gate SONOS memory using a novel dynamic

Kuan Ti Wang*, Tien-Sheng Chao, Woei Cherng Wu, Tsung Yu Chiang, Yi Hong Wu, Wen Luh Yang, Chien Hsing Lee, Tsung Min Hsieh, Jhyy Cheng Liou, Shen De Wang, Tzu Ping Chen, Chien Hung Chen, Chih Hung Lin, Hwi Huang Chen

*Corresponding author for this work

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

A high programming speed with a low-powerconsumption wrapped-select-gate poly-Si-oxide-nitride-oxidesilicon memory is successfully demonstrated using the novel dynamic threshold source-side-injection programming technique. The select gate embedded in such particular memory structure acts like a dynamic MOSFET resulting in programming current (IPGM) that can be enhanced in this DT mode, easily attaining a high programming speed of about 100 ns. It still doubles the memory density by achieving the 2-bit/cell operation with MLC under DT mode.

Original languageEnglish
Pages (from-to)659-661
Number of pages3
JournalIEEE Electron Device Letters
Volume30
Issue number6
DOIs
StatePublished - 30 Apr 2009

Keywords

  • Dynamic-threshold
  • Memory
  • Poly-Si-oxidenitride-oxide-silicon (SONOS)

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    Wang, K. T., Chao, T-S., Wu, W. C., Chiang, T. Y., Wu, Y. H., Yang, W. L., Lee, C. H., Hsieh, T. M., Liou, J. C., Wang, S. D., Chen, T. P., Chen, C. H., Lin, C. H., & Chen, H. H. (2009). High-speed multilevel wrapped-select-gate SONOS memory using a novel dynamic. IEEE Electron Device Letters, 30(6), 659-661. https://doi.org/10.1109/LED.2009.2019255