High Speed Energy Efficient Optical Receiver

Yuan Sheng Lee, Wei-Zen Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper describes the design techniques of high speed, energy efficient optical receivers, covering from the front-end amplifier to the post clock and data recovery circuit (CDR). An integration type optical receiver incorporating with a current boost preamplifier and a baud rate CDR is proposed to improve the receiver sensitivity as well as its energy efficiency. A fully integrated experimental prototype is implemented in a TSMC 40 nm CMOS technology that achieves a high energy efficiency of 2.1 pJ/bit at 25 Gbps operation.

Original languageEnglish
Title of host publication2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538662342
DOIs
StatePublished - 9 Oct 2018
Event2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018 - Shenzhen, China
Duration: 6 Jun 20188 Jun 2018

Publication series

Name2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018

Conference

Conference2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
CountryChina
CityShenzhen
Period6/06/188/06/18

Keywords

  • Baud Rate Clock and Data Recovery Circuit
  • Equalizer
  • Optical Receiver
  • Transimpedance Amplifier

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  • Cite this

    Lee, Y. S., & Chen, W-Z. (2018). High Speed Energy Efficient Optical Receiver. In 2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018 [8487122] (2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2018.8487122