High-speed divide-by-4/5 prescalers with merged and gates using GaInP/GaAs HBT and SiGe HBT technologies

Hung Ju Wei*, Chin-Chun Meng, Yu Wen Chang, Yi Chen Lin, Quo Wei Huang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

This paper demonstrates the divide-by-4/5 prescalers with merged AND gates in 2-μm GaInP/GaAs heterojunction bipolar transistor (HBT) and 0.35-μm SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fT), the maximum operating frequency of a D-type flip-flop can be promoted. At the supply voltage of 5V, the GaInP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1-8 GHz at the cost of power consumption.

Original languageEnglish
Pages (from-to)1498-1500
Number of pages3
JournalMicrowave and Optical Technology Letters
Volume50
Issue number6
DOIs
StatePublished - 1 Jun 2008

Keywords

  • Divide-by-4/5
  • Dual-modulus
  • Emitter-couple logic (ECL)
  • GaInP/GaAs
  • Heterojunction bipolar transistor (HBT)
  • Prescaler
  • SiGe

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