This letter introduces a polycrystalline-silicon nanowire (NW) thin-film nonvolatile memory (NVM) with a self-assembled silicon-nanocrystal (Si-NC) embedded charge-trapping (CT) layer. This process is simple and compatible with conventional CMOS processes. Experimental results indicate that this NW NVM exhibits high reliability due to a deep-quantum-well structure and immunity of enhanced electric field underneath a disk-shaped Si-NC. After 10 000 P/E cycles, the memory window loss of the NVM with a Si-NC embedded CT layer is less than 12% until 10(4) s at 150 degrees C. Accordingly, a poly-Si thin-film transistor with a Si-NC embedded CT layer is highly promising for NVM applications.
- Nanocrystal (NC); nonvolatile memory (NVM); thin-film transistor (TFT)
- SILICON; GATE; SONOS
Chen, H. B., Wu, Y. C., Chen, L-C., Chiang, J-H., Yang, C-K., & Chang, C-Y. (2012). High-Reliability Trigate Poly-Si Channel Flash Memory Cell With Si-Nanocrystal Embedded Charge-Trapping Layer. IEEE Electron Device Letters, 33(4), 537-539. https://doi.org/10.1109/LED.2012.2184519