High-performance Si nanowire FET with a semi gate-around structure suitable for integration

Soshi Sato*, Hideyuki Kamimura, Hideaki Arai, Kuniyuki Kakushima, Parhat Ahmet, Kenji Ohmori, Keisaku Yamada, Hiroshi Iwai

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

Silicon Nanowire (Si NW) FETs with semi gate-around structures suitable for integration were fabricated using conventional planar CMOS processes. With the use of SiO2 pedestal and SiN sidewalls, lithography and etching steps over NW can be easily processed. A large on-current of 49.6 μA at V g/Vth=1.0 V has been obtained. This value is one of the highest current per nanowire, even though the gate length (200 nm) and gate oxide thickness (5 nm) were relatively large, thanks to high mobility of 387 cm2/Vs. Regarding the off -current control, Ion/I off ratio and S.S. were 107 and 71 mV/dec., respectively. We discussed the case of multi-nanowire FET structure based our results. It can be concluded that multi-Si nanowire FET reveals much larger on-current than that of conventional planar FET.

Original languageEnglish
Title of host publicationESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference
Pages249-252
Number of pages4
DOIs
StatePublished - 2009
Event39th European Solid-State Device Research Conference, ESSDERC 2009 - Athens, Greece
Duration: 14 Sep 200918 Sep 2009

Publication series

NameESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference

Conference

Conference39th European Solid-State Device Research Conference, ESSDERC 2009
CountryGreece
CityAthens
Period14/09/0918/09/09

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    Sato, S., Kamimura, H., Arai, H., Kakushima, K., Ahmet, P., Ohmori, K., Yamada, K., & Iwai, H. (2009). High-performance Si nanowire FET with a semi gate-around structure suitable for integration. In ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference (pp. 249-252). [5331825] (ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference). https://doi.org/10.1109/ESSDERC.2009.5331825