In order to obtain high performance analog MOSFET, it is important to reduce gate resistance. Recently W/TiN, CoSi2 and NiSi gate electrodes are proposed to realize these requirements. Especially, Co salicided T-shape gate electrode is easy to realize low gate resistance below 1.5 ohm/sq. with a small number increase of process steps. Additionally, short channel effects are improved because the junction depth from Si substrate surface at deeper source and drain regions become shallower due to raised source and drain. In this paper, we demonstrate an excellent analog characteristics of Co salicided T-shape gate RF CMOS technology making use of a raised gate/source/drain structures. Extremely high fmax value of 70 GHz was realized by 0.10 μm gate length nMOSFET with low noise and low power consumption.
|Number of pages||2|
|Journal||Digest of Technical Papers - Symposium on VLSI Technology|
|State||Published - 1998|
|Event||Proceedings of the 1998 Symposium on VLSI Technology - Honolulu, HI, USA|
Duration: 9 Jun 1998 → 11 Jun 1998